Minor JIT compiler update.
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@ -230,6 +230,9 @@ warning. PCRE2 now also treats this as a literal.
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53. Related to 52, though PCRE2 was throwing an error for [[:digit:]-X] it was
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not doing so for [\d-X] (and similar escapes), as is documented.
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54. Fixed a MIPS issue in the JIT compiler reported by Joshua Kinard.
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Version 10.23 14-February-2017
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------------------------------
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@ -1561,6 +1561,7 @@ static SLJIT_INLINE CHECK_RETURN_TYPE check_sljit_emit_cmov(struct sljit_compile
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CHECK_ARGUMENT(FUNCTION_CHECK_IS_REG(dst_reg & ~SLJIT_I32_OP));
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if (src != SLJIT_IMM) {
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CHECK_ARGUMENT(FUNCTION_CHECK_IS_REG(src));
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CHECK_ARGUMENT(srcw == 0);
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}
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if ((type & 0xff) <= SLJIT_NOT_ZERO)
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@ -1586,6 +1587,7 @@ static SLJIT_INLINE CHECK_RETURN_TYPE check_sljit_emit_cmov(struct sljit_compile
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static SLJIT_INLINE CHECK_RETURN_TYPE check_sljit_get_local_base(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw offset)
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{
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/* Any offset is allowed. */
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SLJIT_UNUSED_ARG(offset);
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#if (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
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@ -1225,7 +1225,15 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_cmov(struct sljit_compiler *compil
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sljit_s32 dst_reg,
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sljit_s32 src, sljit_sw srcw);
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/* Copies the base address of SLJIT_SP + offset to dst.
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/* Copies the base address of SLJIT_SP + offset to dst. The offset can be
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anything to negate the effect of relative addressing. For example if an
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array of sljit_sw values is stored on the stack from offset 0x40, and R0
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contains the offset of an array item plus 0x120, this item can be
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overwritten by two SLJIT instructions:
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sljit_get_local_base(compiler, SLJIT_R1, 0, 0x40 - 0x120);
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sljit_emit_op1(compiler, SLJIT_MOV, SLJIT_MEM2(SLJIT_R1, SLJIT_R0), 0, SLJIT_IMM, 0x5);
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Flags: - (may destroy flags) */
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SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_local_base(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw offset);
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@ -498,12 +498,13 @@ SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compil
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SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_has_cpu_feature(sljit_s32 feature_type)
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{
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sljit_sw fir = 0;
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switch (feature_type) {
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case SLJIT_HAS_FPU:
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#ifdef SLJIT_IS_FPU_AVAILABLE
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return SLJIT_IS_FPU_AVAILABLE;
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#elif defined(__GNUC__)
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sljit_sw fir;
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asm ("cfc1 %0, $0" : "=r"(fir));
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return (fir >> 22) & 0x1;
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#else
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@ -517,7 +518,7 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_has_cpu_feature(sljit_s32 feature_type)
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#endif
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default:
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return 0;
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return fir;
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}
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}
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@ -760,7 +760,7 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *comp
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(((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
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#endif
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static const sljit_ins data_transfer_insts[64 + 8] = {
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static const sljit_ins data_transfer_insts[64 + 16] = {
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/* -------- Unsigned -------- */
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@ -869,11 +869,20 @@ static const sljit_ins data_transfer_insts[64 + 8] = {
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/* d n x s */ HI(31) | LO(727) /* stfdx */,
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/* d n x l */ HI(31) | LO(599) /* lfdx */,
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/* d w i s */ HI(55) /* stfdu */,
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/* d w i l */ HI(51) /* lfdu */,
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/* d w x s */ HI(31) | LO(759) /* stfdux */,
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/* d w x l */ HI(31) | LO(631) /* lfdux */,
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/* s n i s */ HI(52) /* stfs */,
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/* s n i l */ HI(48) /* lfs */,
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/* s n x s */ HI(31) | LO(663) /* stfsx */,
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/* s n x l */ HI(31) | LO(535) /* lfsx */,
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/* s w i s */ HI(53) /* stfsu */,
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/* s w i l */ HI(49) /* lfsu */,
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/* s w x s */ HI(31) | LO(695) /* stfsux */,
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/* s w x l */ HI(31) | LO(567) /* lfsux */,
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};
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#undef ARCH_32_64
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@ -1753,7 +1762,7 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_custom(struct sljit_compiler *c
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/* Floating point operators */
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/* --------------------------------------------------------------------- */
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#define FLOAT_DATA(op) (DOUBLE_DATA | ((op & SLJIT_F32_OP) >> 6))
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#define FLOAT_DATA(op) (DOUBLE_DATA | ((op & SLJIT_F32_OP) >> 5))
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#define SELECT_FOP(op, single, double) ((op & SLJIT_F32_OP) ? single : double)
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#if (defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64)
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